Reconfigurable cores for wireless appliances: Turbo codes

Brown, Edward (2005) Reconfigurable cores for wireless appliances: Turbo codes. EngD thesis, Universities of Edinburgh, Glasgow, Heriot-Watt and Strathclyde.

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Abstract

The thesis introduces the subject of Turbo codes, highlighting the motivation behind their inclusion in international standards. Particular attention is given to the cdma2000 and UMTS third generation mobile telephony standards. Both the technical and commercial advantages/disadvantages of implementing Turbo codes in a Field Programmable Gate Array (FPGA) based system are discussed. The subject of third generation mobile technology is also discussed, this includes an introduction to spread spectrum and rake receivers. The commercial relevance of all projects conducted is discussed. These projects allowed the sponsoring company to highlight the advantages of using FPGAs in third generation mobile base stations. A novel system for testing forward error correction (FEC) codes is presented. Results obtained are shown and discussed. A novel parameterisable Turbo decoder will also be highlighted. The decoder in question allows the user to specify certain criteria that can be used to control the memory used by the decoder and its latency. A novel hardware architecture for Turbo decoders is proposed, as is a unique channel variance value that optimises a cdma2000 Turbo decoder. Other subjects covered are Duo-Binary Turbo codes. Turbo decoder hardware architectures and how to calculate the input values to Turbo decoders.

Item Type: Thesis (EngD)
Qualification Level: Doctoral
Additional Information: Adviser: J M Irvine
Keywords: Computer science, Electrical engineering
Colleges/Schools: College of Science and Engineering
Date of Award: 2005
Depositing User: Enlighten Team
Unique ID: glathesis:2005-74099
Copyright: Copyright of this thesis is held by the author.
Date Deposited: 07 Aug 2019 11:03
Last Modified: 07 Aug 2019 11:05
URI: http://theses.gla.ac.uk/id/eprint/74099

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