Digital signal processing platform based on a novel dynamically reconfigurable array

Aslam, Nazish (2009) Digital signal processing platform based on a novel dynamically reconfigurable array. EngD thesis, Universities of Edinburgh, Glasgow, Heriot-Watt and Strathclyde.

Due to Embargo and/or Third Party Copyright restrictions, this thesis is not available in this service.
Printed Thesis Information:


Dynamically reconfigurable processors are attracting significant interest in the semiconductor industry as they are promising to provide a new level of trade-off between the conflicting parameters of performance, flexibility, silicon area, power consumption and Non-Recurring Engineering (NRE) costs.

The work presented in this thesis addresses two major areas in the design of a platform based around a novel reconfigurable array. Reconfigurable architectures generally suffer from poor code densities with very wide instruction words. The first project is focused on how best to reduce the program memory footprint, in order to reduce area and potentially the power consumption, thus making the product marketable in the mobile phone industry. Existing compression techniques are found to be unsuitable for the target architecture, thus new schemes are devised.

The second project is concerned with porting DSP applications to the reconfigurable architecture to gain the best trade-off between performance (i.e. throughput) and cost (in terms of the number of functional units/on-chip resources used). This ensures the final product delivers the
required performance without sacrificing flexibility or cost points, thus yielding a competitive product. Third party proprietary DSP algorithms as well as open source algorithms are ported in C. Issues have been identified and suggestions are put forward for tackling the issues on the architecture and associated tools.

Item Type: Thesis (EngD)
Qualification Level: Doctoral
Subjects: Q Science > QA Mathematics > QA75 Electronic computers. Computer science
T Technology > TK Electrical engineering. Electronics Nuclear engineering
Colleges/Schools: College of Science and Engineering > School of Engineering
Supervisor's Name: Milward, Dr Mark and Erdogan, Dr Ahmet and Arslan, Prof Tughrul
Date of Award: 2009
Embargo Date: 2 July 2012
Depositing User: Miss Nazish Aslam
Unique ID: glathesis:2009-805
Copyright: Copyright of this thesis is held by the author.
Date Deposited: 02 Jul 2009
Last Modified: 10 Dec 2012 13:26

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