A radio frequency capacitive discharge digital to analogue converter

Collins, Steven John (2012) A radio frequency capacitive discharge digital to analogue converter. EngD thesis, Institute for System Level Integration, joint award: University of Edinburgh, University of Glasgow, University of Strathclyde, Heriot Watt University.

Due to Embargo and/or Third Party Copyright restrictions, this thesis is not available in this service.
Printed Thesis Information: https://eleanor.lib.gla.ac.uk/record=b2936841


As the communications revolution continues there is an ever increasing demand for integrated transmitters and receivers on silicon in devices such as mobile phones and networking products. The demand to integrate complete systems onto a single die has driven a need to minimise the area of transmitters which has led to research into combining digital to analogue converters and RF mixers to minimise their area.

The drive for increasing speeds and smaller transistors has resulted in higher
capacitance densities and lower operating voltages, the latter making it more difficult to implement conventional transmitter circuits. Therefore there is a need for passive transmitter systems that maximise the output power to the load by minimising the voltage overhead on the output signal.

This thesis proposes and demonstrates that it is possible to use a digital to analogue converter that performs RF up conversion using direct capacitive discharge to the load, which takes advantage of the large capacitance densities
of a modern 40nm CMOS process. The DAC uses charge sharing in a similar manner to a charge sharing DAC without the bandwidth limitations imposed by an output amplifier.

The RF frequency up conversion at the DAC data clock rate is produced using two DACs that differentially output the complement of each other on different halves of the clock cycle (one outputting while the other is charging) thereby
emulating a passive switched mixer.

The thesis shows that an 8 bit capacitive discharge DAC of 0.16mm2 can output 3dBm into a 50Ω load at 2.15GHz using a clock rate of 2GHz with MTPR of greater than 30dBc.

Item Type: Thesis (EngD)
Qualification Level: Doctoral
Keywords: DAC, Digital to Analogue Converter, Capacative Discharge DAC, RF DAC, RF modulation.
Subjects: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Colleges/Schools: College of Science and Engineering > School of Engineering
Supervisor's Name: Henderson, Dr. Robert and Findlater, Dr. Keith
Date of Award: 2012
Embargo Date: 16 January 2020
Depositing User: Mr Steven J Collins
Unique ID: glathesis:2012-3371
Copyright: Copyright of this thesis is held by the author.
Date Deposited: 12 Jun 2012
Last Modified: 28 Apr 2022 10:37
URI: http://theses.gla.ac.uk/id/eprint/3371

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