Fabrication and Characterisation of Short Gate Length Heterojunction Field Effect Transistors

Thayne, Iain (1993) Fabrication and Characterisation of Short Gate Length Heterojunction Field Effect Transistors. PhD thesis, University of Glasgow.

Abstract

This thesis is concerned with the fabrication and characterisation of short gate length heterojunction field effect transistors (HFETs). Devices with gate lengths in the range 80-200nm were fabricated on three different material structures containing two dimensional electron gases (2DEGs). The layer structures were based on: i) A10.25GaAs/GaAs with an A10.25GaAs back confining barrier 300A from the 2DEG ii) pseudomorphic A10.3GaAs/In0.15GaAs/GaAs with a 150A In0.15GaAs channel layer iii) pseudomorphic In0.52A1As/In0.65GaAs/InP with a 100A In0.65GaAs channel layer Magnetoresistance studies showed the 2DEGs of the three materials had very different transport properties. This permitted an investigation of the dependence of high frequency device performance on material structure to be performed. To investigate the dependence of gate resistance on device performance, HFET's with conventional and T-gate structures were fabricated. The 80nm footprint T-gate process developed in the course of this work reduced the gate resistance by a factor of five compared with conventional 80nm footprint structures. High frequency characterisation of devices up to 60GHz showed the following main results: i) 80nm gate length In0.52A1As/In0.65GaAs/InP HFETs with rf transconductances up to 1100mS/mm. This translates to an effective channel velocity of 2.4x105ms-1. ii) 80nm devices with fT's of up to 275GHz were fabricated on the InAlAs/InGaAs/InP layer structure. Such fT's were nearly twice those of similar gate length devices fabricated on both the AlGaAs/GaAs and AlGaAs/InGaAs/GaAs structures. iii) From the Fr measurements, the effective carrier velocity in the device channel was extracted. Effective velocities in excess of 2.0x105ms-1 were extracted for the InAlAs/InGaAs/InP devices, indicating significant velocity overshoot in the channel of this layer structure. The large indium content of the channel gives a large F-L valley energy separation whilst reducing the electron effective mass. Both these effects increase the probability of velocity overshoot, and are most probably the cause of the large effective velocities deduced for the In0.65GaAs channel devices. There was no conclusive evidence of overshoot in devices fabricated on either the AlGaAs/InGaAs/GaAs or AIGaAs/GaAs structures. iv) For the materials of this study, it was deduced that effective velocity was the dominant transport property in determining device fr at a given gate length. Neither the low field mobility or 2DEG carrier concentration were found to govern device fT v) Both device DC and RF output resistance can be increased by increasing the potential barrier below the 2DEG and thus improving electron confinement to the channel. vi) The 80nm footprint T-gate structure increases device gain by up to 6dB at 60GHz compared to a conventional 80nm gate device. vii) Although the fT's of the InAlAs/InGaAs/InP HI-ETs were much larger than those of the AlGaAs/GaAs and AlGaAs/InGaAs/GaAs HFET's, the tax of conventional gate structure devices fabricated on all three materials were around 80GHz. The fmax of 80nm T-gate InAlAs/InGaAs/InP devices was 180GHz, clearly showing that gate resistance dominates short gate length device high frequency gain.

• Item Type: Thesis (PhD)
• Qualification Level: Doctoral
• Additional Information: Adviser: John Lamb
• Keywords: Electrical engineering
• Date of Award: 1993
• Depositing User: Enlighten Team
• Unique ID: glathesis:1993-75365
• Copyright: Copyright of this thesis is held by the author.
• Date Deposited: 19 Nov 2019 20:24
• Last Modified: 19 Nov 2019 20:24
• URI: https://theses.gla.ac.uk/id/eprint/75365