DesignTag: a system for identifying and protecting intellectual property within integrated circuits

McLaren, David (2010) DesignTag: a system for identifying and protecting intellectual property within integrated circuits. EngD thesis, Submitted to the Universities of Edinburgh, Glasgow, Heriot-Watt, Strathclyde.

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This thesis describes DesignTag, a system which can be used to identify electronic design intellectual property (IP) within operating integrated circuits (ICs). The ability to accurately identify IP within ICs has several important applications, including IP theft detection, identifying unmarked ICs and detecting counterfeit devices. Current and proposed methods for identifying IP within ICs are either inadequate for many applications, or are expensive, time consuming and difficult to use. In contrast, the DesignTag system is useful for a wide range of applications, is easy to use, and allows inexpensive and fast detection of IP. The DesignTag system consists of a small “tag” circuit which is added to a piece of IP and a tag detection sub-system which is used to detect signals transmitted by on-chip tags. These signals are transmitted using a thermal side channel, a novel approach in which information is communicated by varying the temperature of an IC package. In addition to discussing the DesignTag system as a whole, this thesis focuses on the development of the tag detection sub-system, adapting concepts from CDMA wireless communications to enable the detection of thermally transmitted tag signals.

Item Type: Thesis (EngD)
Qualification Level: Doctoral
Keywords: DesignTag, intellectual property protection, watermarking, IP tagging, IP theft detection, counterfeit IC detection, thermal communication
Subjects: T Technology > T Technology (General)
Colleges/Schools: College of Science and Engineering > School of Engineering
Supervisor's Name: Soraghan, Professor John J.
Date of Award: 2010
Embargo Date: 31 March 2025
Depositing User: Mr David McLaren
Unique ID: glathesis:2010-2250
Copyright: Copyright of this thesis is held by © Algotronix Ltd., 2010
Date Deposited: 03 Dec 2010
Last Modified: 07 Feb 2020 17:22

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