Switched-current filtering systems: design, synthesis and software development

Ng, Andrew Eng Jwee (1999) Switched-current filtering systems: design, synthesis and software development. PhD thesis, University of Glasgow.

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Printed Thesis Information: https://eleanor.lib.gla.ac.uk/record=b1820520


Allpass filters are commonly employed in many applications to perform group delay equalisation in the passband. They are non-minimum phase by definition and are characterised by poles and zeros in mirror-image symmetry. SI allpass filters of both cascade biquad and bilinear-LDI ladder types have been in existence. These were implemented using Euler based integrators. Cascade biquads are known to have highly sensitive amplitude responses and Euler integrators suffer from excess phase. The equalisers that are proposed here are based on bilinear integrators instead of Euler ones. Derivation of these equalisers can proceed from either the s-domain, or directly from the z-domain, where a prototype is synthesised using the respective continued-fractions expansions, and simulated using standard matrix methods. The amplitude response of the bilinear allpass filter is shown to be completely insensitive to deviations in the reactive ladder section. Simulations of sensitivities and non-ideal responses reveal the advantages and disadvantages of the various structures.

Existing DI multirate filters have to date been implemented as direct-form FIR and IIR polyphase structures, or as simple cascade biquad or ladder structures with non-optimum settling times. FIR structures require a large number of impulse coefficients to realise highly selective responses. Even in the case of linear phase response with symmetric impulse coefficients, when the number of coefficients can be halved, significant overheads can be incurred by additional multiplexing circuitry. Direct-form IIR structures are simple but are known to be sensitive to coefficient deviations and structures with non-optimum settling times operate entirely at the higher clock frequency. The novel SI decimators and interpolators proposed are based on low sensitivity ladder structures coupled with FIR polyphase networks. They operate entirely at the lower clock frequency which maximises the time available for the memory cells to settle. Two different coupling architectures with different advantages and disadvantages are studied.

Item Type: Thesis (PhD)
Qualification Level: Doctoral
Subjects: T Technology > T Technology (General)
Colleges/Schools: College of Science and Engineering > School of Engineering
Supervisor's Name: Sewell, Professor John I.
Date of Award: 1999
Depositing User: Ms Mary Anne Meyering
Unique ID: glathesis:1999-5040
Copyright: Copyright of this thesis is held by the author.
Date Deposited: 20 Mar 2014 09:28
Last Modified: 24 Mar 2014 13:22
URI: http://theses.gla.ac.uk/id/eprint/5040

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