Statistical compact model strategies for nano CMOS transistors subject of atomic scale variability

Moezi, Negin (2012) Statistical compact model strategies for nano CMOS transistors subject of atomic scale variability. PhD thesis, University of Glasgow.

Abstract

One of the major limiting factors of the CMOS device, circuit and system simulation in sub 100nm regimes is the statistical variability introduced by the discreteness of charge and granularity of matter. The statistical variability cannot be eliminated by tuning the layout or by tightening fabrication process control. Since the compact models are the key bridge between technology and design, it is necessary to transfer reliably the MOSFET statistical variability information into compact models to facilitate variability aware design practice.
The aim of this project is the development of a statistical extraction methodology essential to capture statistical variability with optimum set of parameters particularly in industry standard compact model BSIM. This task is accomplished by using a detailed study on the sensitivity analysis of the transistor current in respect to key parameters in compact model in combination with error analysis of the fitted Id-Vg characteristics. The key point in the developed direct statistical compact model strategy is that the impacts of statistical variability can be captured in device characteristics by tuning a limited number of parameters and keeping the values for remaining major set equal to their default values obtained from the “uniform” MOSFET compact model extraction. However, the statistical compact model extraction strategies will accurately represent the distribution and correlation of the electrical MOSFET figures of merit. Statistical compact model parameters are generated using statistical parameter generation techniques such as uncorrelated parameter distributions, principal component analysis and nonlinear power method. The accuracy of these methods is evaluated in comparison with the results obtained from ‘atomistic’ simulations. The impact of the correlations in the compact model parameters has been analyzed along with the corresponding transistor figures of merit. The accuracy of the circuit simulations with different statistical compact model libraries has been studied. Moreover, the impact of the MOSFET width/length on the statistical trend of the optimum set of statistical compact model parameters and electrical figures of merit has been analyzed with two methods to capture geometry dependencies in proposed statistical models.

• Item Type: Thesis (PhD)
• Qualification Level: Doctoral
• Keywords: Statistical Variability, Compact Model, BSIM, Nano CMOS
• Subjects: T Technology > T Technology (General)
• Colleges/Schools: College of Science and Engineering > School of Engineering
• Supervisor's Name: Asenov, Prof. Asen and Roy, Dr. Scott
• Date of Award: 2012
• Depositing User: Mrs Negin Moezi
• Unique ID: glathesis:2012-3447
• Copyright: Copyright of this thesis is held by the author.
• Date Deposited: 15 Jun 2012
• Last Modified: 10 Dec 2012 14:07
• URI: https://theses.gla.ac.uk/id/eprint/3447