Ultra-thin chip-based printed electronics for emerging high-performance flexible electronics

Ma, Sihang (2024) Ultra-thin chip-based printed electronics for emerging high-performance flexible electronics. PhD thesis, University of Glasgow.

Abstract

Flexible hybrid electronic (FHE) systems that signify the integration of printed electronics and conventional silicon (Si)-based CMOS technology, have gained tremendous interest in the past years owing to their newly discovered opportunities in wearables, soft robotics, ultra-thin displays, and healthcare devices, etc. These FHE systems are envisioned to cater to the demanding requisites of large-area electronics while maintaining high performance. Obtaining these characteristics exclusively through current Si technology or printed electronics however proves to be challenging. Achieving large-area electronics using Si technology alone is a demanding and high-cost task, and obtaining high performance with minimal data delays through printed electronics alone presents a substantial challenge. Nevertheless, the latter has unlocked pathways to resource-efficient and potentially environmentally sustainable routes for deploying electronics on diverse substrates. Consequently, the pragmatic approach involves the integration of devices fabricated through Si-CMOS technology and printed electronics into hybrid systems.

It is important to note that conventional Si-CMOS technology predominantly yields rigid devices. Therefore, the incorporation of thinning techniques to reduce wafer or chip thickness not only facilitates bendability but also ensures the preservation of flexibility within FHE systems. In this context, the concept of "flexible hybrid electronics (FHE)" or "heterogeneous integration," which combines ultra-thin chips (UTCs) with printed devices and interconnects, has garnered substantial interest. Despite advancements in each of these domains in recent years, substantial challenges persist in the effective integration of these technologies onto flexible substrates. Therefore, this thesis is devoted to addressing the enduring challenges associated with the development of ultra-thin integrated circuits (ICs) and their seamless integration with flexible foils, particularly in realising reliable interconnects using suitable techniques.

Firstly, the challenges associated with the development and handling of thin ICs are addressed. A novel two-step thinning process is devised, encompassing lapping with polymethyl methacrylate (PMMA) sacrificial technique and chemical etching using tetra-methylammonium hydroxide (TMAH), enabling the attainment of UTCs with a thickness of up to 2 µm. The reliable and high-throughput lapping process is proven to be efficient and effective by showing stable device performance after thinning Si-based metal oxide semiconductor capacitors (MOSCAPs), aluminium nitride (AlN)-based pressure sensors and metal oxide semiconductor field effect transistors (MOSFETs) down to 35 µm with excellent flexibility. Si-based MOSFET UTCs have been used for all the following processes to enable FHE systems in this thesis to evaluate the reliability of the developed procedures. The challenges relating to physically bonding thin ICs have been addressed by adopting the direct transfer printing process. The electrical bonding between thin ICs and flexible foils is thoroughly studied and developed using high-resolution extrusion and electrohydrodynamic inkjet (EHD) printing. UTC-based MOSFET device performance is comprehensively evaluated at each fabrication step and eventually under bending, repeatedly confirming the reliability of every developed process step. The EHD printing system has also been adopted to realise high aspect ratio 3D pillars, opening opportunities to create out-of-plane high-density and high-performance electronics, demonstrated by fabricating photodetectors with excellent UV sensing and omnidirectional light-absorption ability. This thesis, which entails a comprehensive evaluation of each meticulously developed process, has not only affirmed the reliability and repeatability of these procedures but has also demonstrated their efficacy in the pursuit of realising high-density thin Si IC-based FHE systems. Through rigorous investigations, this research establishes a solid foundation for the implementation of these processes in practical applications.

• Item Type: Thesis (PhD)
• Qualification Level: Doctoral
• Subjects: T Technology > T Technology (General); T Technology > TA Engineering (General). Civil engineering (General); T Technology > TK Electrical engineering. Electronics Nuclear engineering
• Colleges/Schools: College of Science and Engineering > School of Engineering > Electronics and Nanoscale Engineering
• Supervisor's Name: Wasige, Professor Edward and Dahiya, Professor Ravinder
• Date of Award: 2024
• Depositing User: Theses Team
• Unique ID: glathesis:2024-84292
• Copyright: Copyright of this thesis is held by the author.
• Date Deposited: 03 May 2024 10:19
• Last Modified: 03 May 2024 10:19
• Thesis DOI: 10.5525/gla.thesis.84292
• URI: https://theses.gla.ac.uk/id/eprint/84292

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